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Digital Design Engineer (FPGA/ASIC)

A newly created opportunity to contribute to the evolution of system architecture and underpinning digital design of current and future products. You will be a technology enthusiast, keen to collaborate and design within a small, relaxed but professional multi-disciplinary team.  You will have a ‘can-do’ attitude and be excited to be part of a company that pushes the boundaries of technology to new heights. You will have a robust and methodical approach to design with good communication and documentation skills to ensure your essential work can be accessible to other parties.

We provide an inclusive and collaborative environment where innovation can be fostered through continuous personal and professional development.

We are looking for an experienced Design Engineer with 2 to 3 years industrial experience who will work closely with our CEO and Interim VLSI design specialist to ultimately take responsibility for;

  • Translating customer requirements into comprehensive device and system-level specification
  • Full ownership of the digital design implementation and test on FPGA
  • Enhancing FPGA and system design simulation, modelling and test benches
  • Regular communication with internal software and hardware R&D teams
  • Liaise with customers to ensure our deliverables meet or exceed specification and expectation
  • Revising and updating the existing product
  • Developing the next generation of products
  • Management of 3rd party VLSI design services for full-custom silicon design 

Your Expertise

You will be able to demonstrate technical experience in the following areas:

  • Proficiency in Verilog HDL for RTL design and simulation
  • Robust IP design for re-use practice and methodologies for SOC (system-on-chip) reuse
  • RTL specification, design, integration and verification
  • Specification, sourcing and integration of digital and analogue IP from 3rd Parties
  • Solid understanding of FPGA device fabrics and design tools
  • Efficient translation of design or algorithms to available FPGA/system resources in line with cost and performance constraints
  • Target FPGA for pre-silicon sign-off and liaison with ‘back-end’ VLSI design services


Nice to have (it’s an advantage to have these skills but not a pre-requisite):

  • Experience of working in an Optics focused environment would be beneficial
  • An understanding of Mechanical/Thermal design/modelling
  • PCB specification and/or design of complex multi-layer boards
  • Familiarity with RF and good practices for best EMC performance (FCC/CE)
  • Understanding of Algorithms development and Mathematical Modelling (Matlab)
  • Familiarity with embedded firmware (C/C++) and target micro-processor(e.g. 805x, ARM, x86)
  • Synthesis/optimisation – power, area and STA constraints
  • Awareness of production DFT/BIST for ASIC and ASSP
  • Low noise and low power VLSI design
  • Experience with version control systems such as Subversion.

Salary: Negotiable and based on experience

Benefits: Future Share Options Scheme (to be setup in the near future), Flexible working, Life Insurance, Discounted Membership to on-campus fitness centre, Friday social hour, 35 days holiday per annum.


Please email Jan Mutch with your CV and a cover letter for an initial discussion.

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